https://gcc.gnu.org/bugzilla/show_bug.cgi?id=110136
--- Comment #2 from Andrew Pinski <pinskia at gcc dot gnu.org> --- (In reply to Andrew Pinski from comment #1) > >In the regrename passover optimization > > I am trying to understand the issue. > > 5912 ldx.d $r20,$r16,$r19 > 5913 add.d $r1,$r16,$r20 > 5914 jr $r1 > > Is the issue is jr does not like r1 register or some other kind of > performance issue? If it is just r1 that is the issue, you could change the pattern in loongarch.md to discourage r1 by changing the constraints there. Because right now it assumes all registers are similar in cost: (define_insn "@indirect_jump<mode>" [(set (pc) (match_operand:P 0 "register_operand" "r"))] "" "jr\t%0" [(set_attr "type" "jump") (set_attr "mode" "none")])