https://gcc.gnu.org/bugzilla/show_bug.cgi?id=109615
Bug ID: 109615
Summary: Redundant VSETVL after optimized code of RVV
Product: gcc
Version: 14.0
Status: UNCONFIRMED
Severity: normal
Priority: P3
Component: c
Assignee: unassigned at gcc dot gnu.org
Reporter: pan2.li at intel dot com
Target Milestone: ---
Assume we have a sample code as below.
#include "riscv_vector.h"
void f (int8_t * restrict in, int8_t * restrict out, int n, int m, int cond)
{
size_t vl = 101;
if (cond)
vl = m * 2;
else
vl = m * 2 * vl;
for (size_t i = 0; i < n; i++)
{
vint8mf8_t v = __riscv_vle8_v_i8mf8 (in + i, vl);
__riscv_vse8_v_i8mf8 (out + i, v, vl);
vbool64_t mask = __riscv_vlm_v_b64 (in + i + 100, vl);
vint8mf8_t v2 = __riscv_vle8_v_i8mf8_tumu (mask, v, in + i + 100, vl);
__riscv_vse8_v_i8mf8 (out + i + 100, v2, vl);
}
for (size_t i = 0; i < n; i++)
{
vint8mf8_t v = __riscv_vle8_v_i8mf8 (in + i + 300, vl);
__riscv_vse8_v_i8mf8 (out + i + 300, v, vl);
}
}
Currently the upstream will generate the code as below with *-march=rv64gcv -O3
-frename-registers* options. It looks like the last vsetvl of .L4 bb is
redundant.
f:
slliw a3,a3,1
bne a4,zero,.L2
li a5,101
mul a3,a3,a5
.L2:
addi a4,a1,100
add t1,a0,a2
mv t0,a0
beq a2,zero,.L1
vsetvli zero,a3,e8,mf8,tu,mu
.L4:
addi a6,t0,100
addi a7,a4,-100
vle8.v v1,0(t0)
addi t0,t0,1
vse8.v v1,0(a7)
vlm.v v0,0(a6)
vle8.v v1,0(a6),v0.t
vse8.v v1,0(a4)
addi a4,a4,1
bne t0,t1,.L4
addi a0,a0,300
addi a1,a1,300
add a2,a0,a2
vsetvli zero,a3,e8,mf8,ta,ma // <= redundant ?
.L5:
vle8.v v2,0(a0)
addi a0,a0,1
vse8.v v2,0(a1)
addi a1,a1,1
bne a2,a0,.L5
.L1:
ret
