https://gcc.gnu.org/bugzilla/show_bug.cgi?id=108874
--- Comment #13 from CVS Commits <cvs-commit at gcc dot gnu.org> --- The trunk branch has been updated by Andrew Pinski <pins...@gcc.gnu.org>: https://gcc.gnu.org/g:fcbc5c190c40b51c82f827830ce403c07d628960 commit r13-6591-gfcbc5c190c40b51c82f827830ce403c07d628960 Author: Andrew Pinski <apin...@marvell.com> Date: Fri Mar 10 00:53:39 2023 +0000 Fix PR 108874: aarch64 code regression with shift and ands After r6-2044-g98e30e515f184b, code like "((x & 0xff00ff00U) >> 8)" would be optimized like (x >> 8) & 0xff00ffU which is normally better except on aarch64, the shift right could be combined with another operation in some cases. So we need to add a few define_splits to the aarch64 backends that match "((x >> shift) & CST0) OP Y" and splits it to: TMP = X & CST1 (TMP >> shift) OP Y Note this also gets us to matching rev16 back too so I added a testcase to make sure we don't lose that matching any more. Note when the generic patch to recognize those as bswap ROT 16, we might regress again and need to add a few more patterns to the aarch64 backend but will deal with that once that happens. Committed as approved after a bootstrapp/test on aarch64-linux-gnu with no regressions. gcc/ChangeLog: * config/aarch64/aarch64.md: Add a new define_split to help combine. gcc/testsuite/ChangeLog: * gcc.target/aarch64/rev16_2.c: New test. * gcc.target/aarch64/shift_and_operator-1.c: New test.
