https://gcc.gnu.org/bugzilla/show_bug.cgi?id=108182
--- Comment #3 from Gaius Mulley <gaius at gcc dot gnu.org> --- I believe I have a fix for the target options. I've built gm2 as a cross compiler for the avr series of microprocessors with the fix and now get a cc1gm2 ICE (after the correct arguments are presented to cc1gm2 :-). Possibly due the separate ID space and scaffold issue? Anyway I'll attach the proposed patches to this PR shortly.
