[Bug rtl-optimization/106615] New: redundant load and store introduced in if-true-branch

[absoler at smail dot nju.edu.cn via Gcc-bugs]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=106615

            Bug ID: 106615
           Summary: redundant load and store introduced in if-true-branch
           Product: gcc
           Version: 12.1.0
            Status: UNCONFIRMED
          Severity: normal
          Priority: P3
         Component: rtl-optimization
          Assignee: unassigned at gcc dot gnu.org
          Reporter: absoler at smail dot nju.edu.cn
  Target Milestone: ---

Given the code:

int g_36 = 0x0B137D37L;
int *g_35 = &g_36;
int g_44[2] = {0x964071C1L,0x964071C1L};

unsigned char  func_1(void);
int * func_16(int * p_17, unsigned long int  p_18);
int * func_19(int * p_20);


unsigned char func_1() { func_16(func_19(g_35), g_44[1]); }
int* func_16(int *a, unsigned long int b) {
        unsigned int c=1;
        *a = g_44;
        if ((g_44[0] = c) <= b)
                ;
        else
                *a = 0;
}
int* func_19(int32_t *d) {
        g_44[1] |= g_36 ;
        return d;
}

when it's compiled on gcc-12.1 with option -O1, the generated asm code of
func_16 will be:

0000000000401186 <func_16>:
  401186:       b8 60 40 40 00          mov    $0x404060,%eax
  40118b:       89 07                   mov    %eax,(%rdi)
  40118d:       c7 05 c9 2e 00 00 01    movl   $0x1,0x2ec9(%rip)        #
404060 <g_44>
  401194:       00 00 00 
  401197:       b8 00 00 00 00          mov    $0x0,%eax
  40119c:       48 85 f6                test   %rsi,%rsi
  40119f:       74 02                   je     4011a3 <func_16+0x1d>
  4011a1:       8b 07                   mov    (%rdi),%eax    
 # rdi keep the address of g_36
  4011a3:       89 07                   mov    %eax,(%rdi)
  4011a5:       c3                      retq  

We can see g_36 will be loaded to %eax and stored back as is when the
if-condition is true. This operation should be redundant?