https://gcc.gnu.org/bugzilla/show_bug.cgi?id=105922
Andrew Pinski <pinskia at gcc dot gnu.org> changed:
What |Removed |Added
----------------------------------------------------------------------------
Summary|AArch64 SVE instruction |autovectorizer does not
|generated with all SIMD |handle fp exceptions
|lane active and zero-divide |correctly for SVE
|exception flag raised |
Status|UNCONFIRMED |NEW
Ever confirmed|0 |1
Last reconfirmed| |2022-06-12
--- Comment #1 from Andrew Pinski <pinskia at gcc dot gnu.org> ---
Confirmed. The division should have been predicated on the same as the
load/store but currently GCC does not do that.
GCC does not really support looking into fpu status bits or exceptions while
vectorizing either.
