[Bug target/105079] _mm_storeu_si16 inefficiently uses pextrw to an integer reg (without SSE4.1)

[cvs-commit at gcc dot gnu.org via Gcc-bugs]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=105079

--- Comment #2 from CVS Commits <cvs-commit at gcc dot gnu.org> ---
The master branch has been updated by Uros Bizjak <u...@gcc.gnu.org>:

https://gcc.gnu.org/g:2680f5eec23805ab8a344f942ca5a7e180d57905

commit r13-86-g2680f5eec23805ab8a344f942ca5a7e180d57905
Author: Uros Bizjak <ubiz...@gmail.com>
Date:   Tue May 3 17:59:40 2022 +0200

    i386: Optimize _mm_storeu_si16 w/o SSE4 [PR105079]

    Optimize _mm_storeu_si16 to use MOVD from a SSE to an integer register
    instead of PEXTRW from a low word of the SSE register to an integer reg.

    Avoid the transformation when optimizing for size for targets without
    TARGET_INTER_UNIT_MOVES_FROM_VEC capability, where the transformation
    results in two moves via a memory location.

    2022-05-03  Uroš Bizjak  <ubiz...@gmail.com>

    gcc/ChangeLog:

            PR target/105079
            * config/i386/sse.md (*vec_extract<mode>_0_mem): New pre-reload
            define_insn_and_split pattern.

    gcc/testsuite/ChangeLog:

            PR target/105079
            * gcc.target/i386/pr105079.c: New test.
            * gcc.target/i386/pr95483-1.c (dg-options): Use -msse4.1.