https://gcc.gnu.org/bugzilla/show_bug.cgi?id=105463
Richard Biener <rguenth at gcc dot gnu.org> changed:
What |Removed |Added
----------------------------------------------------------------------------
Target Milestone|--- |12.0
--- Comment #1 from Richard Biener <rguenth at gcc dot gnu.org> ---
We vectorize correctly using a 1-byte aligned load:
void __GIMPLE (ssa,guessed_local(1073741824))
bar (const unsigned char * block)
{
vector(4) unsigned int vect__3.5;
unsigned int buf[4];
__BB(2,guessed_local(1073741824)):
vect__3.5_14 = __MEM <vector(4) unsigned int, 8> ((char *
{ref-all})block_2(D));
__MEM <vector(4) unsigned int> ((char * {ref-all})&buf) = vect__3.5_14;
foo (&buf);
buf ={v} _Literal (unsigned int[4]) {CLOBBER(eol)};
return;
and expand to
(insn 9 8 10 (set (reg:V4SI 118 [ vect__3.5 ])
(unspec:V4SI [
(mem:V4SI (reg/v/f:SI 114 [ block ]) [0 MEM <vector(4) unsigned
int> [(char * {ref-all})block_2(D)]+0 S16 A8])
] UNSPEC_MISALIGNED_ACCESS)) "t.c":5:3 -1
(nil))
which also looks OK. 'buf' is appropriately aligned:
(insn 10 9 0 (set (mem/c:V4SI (reg/f:SI 117) [0 MEM <vector(4) unsigned int>
[(char * {ref-all})&buf]+0 S16 A64])
(reg:V4SI 118 [ vect__3.5 ])) "t.c":5:3 -1
and it's OK till the very end:
(insn 9 12 10 2 (set (reg:V4SI 28 s12 [orig:118 vect__3.5 ] [118])
(unspec:V4SI [
(mem:V4SI (reg:SI 3 r3 [120]) [0 MEM <vector(4) unsigned int>
[(char * {ref-all})block_2(D)]+0 S16 A8])
] UNSPEC_MISALIGNED_ACCESS)) "t.c":5:3 4951
{*movmisalignv4si_mve_load}
(expr_list:REG_DEAD (reg:SI 3 r3 [120])
(nil)))
so it's a bug in the machine description somehow.
