https://gcc.gnu.org/bugzilla/show_bug.cgi?id=90181
--- Comment #12 from Andrew Pinski <pinskia at gcc dot gnu.org> --- (In reply to Elliott M from comment #11) > (In reply to Andreas Schwab from comment #1) > > x86 doesn't support this either. It just happens to have a few register > > classes that consist of a single register, but only because of ISA > > constraints. > > That is a *gross* mischaracterization. Constraint list for x86 includes: > 'a', 'b', 'c', 'd', 'S', 'D'. Indeed, that doesn't include bp or sp, but > does include *all* the registers which get used for interesting purposes > (register-passing calling conventions). Actually this is NOT a gross mischaracterization of GCC's x86 inline-asm and not understanding that is misrepresenting the history of GCC's inline-asm and how it just exposes internal details of GCC to the user. GCC's x86 constraints are exactly this way because of instructions requirements (ISA constraints) and all of these constraints are used internally too. It just happens that x86_64 register calling convention matches up with the instruction requirements.
