[Bug rtl-optimization/103775] [12 Regression] Assembler messages: Warning: unpredictable transfer with writeback -- `ldrb w0,[x0,16]!'

[cvs-commit at gcc dot gnu.org via Gcc-bugs]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=103775

--- Comment #10 from CVS Commits <cvs-commit at gcc dot gnu.org> ---
The master branch has been updated by Jakub Jelinek <ja...@gcc.gnu.org>:

https://gcc.gnu.org/g:6459e6537632bc06e04e6011ca7fb6488f0e8e7d

commit r12-7832-g6459e6537632bc06e04e6011ca7fb6488f0e8e7d
Author: Jakub Jelinek <ja...@redhat.com>
Date:   Sat Mar 26 16:21:36 2022 +0100

    ecog: Return 1 from insn_invalid_p if REG_INC reg overlaps some stored reg
[PR103775]

    The following testcase ICEs on aarch64-linux with -g and
    assembles with a warning otherwise, because it emits
    ldrb w0,[x0,16]!
    instruction which sets the x0 register multiple times.
    Due to disabled DCE (from -Og) we end up before REE with:
    (insn 12 39 13 2 (set (reg:SI 1 x1 [orig:93 _2 ] [93])
            (zero_extend:SI (mem/c:QI (pre_modify:DI (reg/f:DI 0 x0 [114])
                        (plus:DI (reg/f:DI 0 x0 [114])
                            (const_int 16 [0x10]))) [1 u128_1+0 S1 A128])))
"pr103775.c":5:35 117 {*zero_extendqisi2_aarch64}
         (expr_list:REG_INC (reg/f:DI 0 x0 [114])
            (nil)))
    (insn 13 12 14 2 (set (reg:DI 0 x0 [orig:112 _2 ] [112])
            (zero_extend:DI (reg:SI 1 x1 [orig:93 _2 ] [93])))
"pr103775.c":5:16 111 {*zero_extendsidi2_aarch64}
         (nil))
    which is valid but not exactly efficient as x0 is dead after the
    insn that auto-increments it.  REE turns it into:
    (insn 12 39 44 2 (set (reg:DI 0 x0)
            (zero_extend:DI (mem/c:QI (pre_modify:DI (reg/f:DI 0 x0 [114])
                        (plus:DI (reg/f:DI 0 x0 [114])
                            (const_int 16 [0x10]))) [1 u128_1+0 S1 A128])))
"pr103775.c":5:35 119 {*zero_extendqidi2_aarch64}
         (expr_list:REG_INC (reg/f:DI 0 x0 [114])
            (nil)))
    (insn 44 12 14 2 (set (reg:DI 1 x1)
            (reg:DI 0 x0)) "pr103775.c":5:35 -1
         (nil))
    which is invalid because it sets x0 multiple times, one
    in SET_DEST of the PATTERN and once in PRE_MODIFY.
    As perhaps other passes than REE might suffer from it, IMHO it is better
    to reject this during change validation.

    2022-03-26  Jakub Jelinek  <ja...@redhat.com>

            PR rtl-optimization/103775
            * recog.cc (check_invalid_inc_dec): New function.
            (insn_invalid_p): Return 1 if REG_INC operand overlaps
            any stored REGs.

            * gcc.dg/pr103775.c: New test.