https://gcc.gnu.org/bugzilla/show_bug.cgi?id=104664
Uroš Bizjak <ubizjak at gmail dot com> changed:
What |Removed |Added
----------------------------------------------------------------------------
Keywords| |ra
Component|target |rtl-optimization
--- Comment #3 from Uroš Bizjak <ubizjak at gmail dot com> ---
Reload wants to generate (-mavx2) the following reload for (insn 28):
28: r127:HF=vec_select(r217:V8HF,parallel)
Inserting insn reload before:
177: r218:V8HF=vec_duplicate([`*.LC1'])
178: r217:V8HF=r218:V8HF
But without -mavx2 it generates:
28: r217:HF=vec_select(r218:V8HF,parallel)
Inserting insn reload before:
179: r221:HF=[`*.LC1']
180: r220:V8HF=r221:HF#0
182: r222:V8HF=vec_select(vec_concat(r220:V8HF,r220:V8HF),parallel)
183: r223:V4SI=vec_select(r222:V8HF#0,parallel)
184: r219:V8HF=r223:V4SI#0
185: r218:V8HF=r219:V8HF
Inserting insn reload after:
178: r127:HF=r217:HF
where:
Choosing alt 2 in insn 179: (0) ?r (1) m {*movhf_internal}
Choosing alt 2 in insn 180: (0) v (1) vm {movv8hf_internal}
The allocator could choose alternative 9 (v,m) in:
(define_insn "*movhf_internal"
[(set (match_operand:HF 0 "nonimmediate_operand"
"=?r,?r,?r,?m,v,v,?r,m,?v,v")
(match_operand:HF 1 "general_operand"
"r ,F ,m ,rF,C,v, v,v,r ,m"))]
Since xmm registers support HF and V8HF modes.
Reconfirmed as RA issue.
