https://gcc.gnu.org/bugzilla/show_bug.cgi?id=97005
--- Comment #5 from Jakub Jelinek <jakub at gcc dot gnu.org> ---
What about u16.u8, u32.u8 and u64.u8 zero extensions?
If it is just hi -> {si,di} zext, then we could take HImode out of the
(define_insn "zero_extend<mode>si2"
[(set (match_operand:SI 0 "nvptx_register_operand" "=R,R")
(zero_extend:SI (match_operand:QHIM 1 "nvptx_nonimmediate_operand"
"R,m")))]
""
"@
%.\\tcvt.u32.u%T1\\t%0, %1;
%.\\tld%A1.u%T1\\t%0, %1;"
[(set_attr "subregs_ok" "true")])
(define_insn "zero_extend<mode>di2"
[(set (match_operand:DI 0 "nvptx_register_operand" "=R,R")
(zero_extend:DI (match_operand:QHSIM 1 "nvptx_nonimmediate_operand"
"R,m")))]
""
"@
%.\\tcvt.u64.u%T1\\t%0, %1;
%.\\tld%A1%u1\\t%0, %1;"
[(set_attr "subregs_ok" "true")])
iterators and add patterns for the hisi and hidi that would do the and
afterwards for the cvt case.
