https://gcc.gnu.org/bugzilla/show_bug.cgi?id=103439
--- Comment #4 from Richard Biener <rguenth at gcc dot gnu.org> --- (In reply to Uroš Bizjak from comment #3) > (In reply to rguent...@suse.de from comment #2) > > On Fri, 26 Nov 2021, ubizjak at gmail dot com wrote: > > > > > https://gcc.gnu.org/bugzilla/show_bug.cgi?id=103439 > > > > > > --- Comment #1 from Uroš Bizjak <ubizjak at gmail dot com> --- > > > (In reply to Richard Biener from comment #0) > > > > I'm not sure if there are valid cases where we have a mix of a direct > > > > RTL pattern and manual expansion, so where the { } part falls thru. > > > > > > Yes, we have quite some of them in e.g. i386.md, movstrict<mode>, > > > extv<mode>, > > > extzv<mode>, insv<mode> and zero_extend expanders are some of them. > > > > OK, so that's conditional FAILs. I've not yet found a conditional > > DONE that eventually falls through to a "DONE via the pattern". > > Look at zero_extend and extend expanders. Indeed. (define_expand "zero_extendqihi2" [(set (match_operand:HI 0 "register_operand") (zero_extend:HI (match_operand:QI 1 "nonimmediate_operand")))] "" { if (TARGET_ZERO_EXTEND_WITH_AND && optimize_function_for_speed_p (cfun)) { operands[1] = force_reg (QImode, operands[1]); emit_insn (gen_zero_extendqihi2_and (operands[0], operands[1])); DONE; } }) and /* /home/rguenther/src/trunk/gcc/config/i386/i386.md:4120 */ rtx gen_zero_extendqihi2 (rtx operand0, rtx operand1) { rtx_insn *_val = 0; start_sequence (); { rtx operands[2]; operands[0] = operand0; operands[1] = operand1; #define FAIL return (end_sequence (), _val) #define DONE return (_val = get_insns (), end_sequence (), _val) #line 4124 "/home/rguenther/src/trunk/gcc/config/i386/i386.md" { if (TARGET_ZERO_EXTEND_WITH_AND && optimize_function_for_speed_p (cfun)) { operands[1] = force_reg (QImode, operands[1]); emit_insn (gen_zero_extendqihi2_and (operands[0], operands[1])); DONE; } } #undef DONE #undef FAIL operand0 = operands[0]; (void) operand0; operand1 = operands[1]; (void) operand1; } emit_insn (gen_rtx_SET (operand0, gen_rtx_ZERO_EXTEND (HImode, operand1))); _val = get_insns (); end_sequence (); return _val; } so quite hard if not impossible to "fix" in genemit