https://gcc.gnu.org/bugzilla/show_bug.cgi?id=89021
--- Comment #58 from CVS Commits <cvs-commit at gcc dot gnu.org> --- The master branch has been updated by Uros Bizjak <u...@gcc.gnu.org>: https://gcc.gnu.org/g:37e93925366676201b526624e9f8dc32d82b4ff2 commit r12-1746-g37e93925366676201b526624e9f8dc32d82b4ff2 Author: Uros Bizjak <ubiz...@gmail.com> Date: Wed Jun 23 16:14:31 2021 +0200 i386: Add PPERM two-operand 64bit vector permutation [PR89021] Add emulation of V8QI PPERM permutations for TARGET_XOP target. Similar to PSHUFB, the permutation is performed with V16QI PPERM instruction, where selector is defined in V16QI mode with inactive elements set to 0x80. Specific to two operand permutations is the remapping of elements from the second operand (e.g. e[8] -> e[16]), as we have to account for the inactive elements from the first operand. 2021-06-23 Uroš Bizjak <ubiz...@gmail.com> gcc/ PR target/89021 * config/i386/i386-expand.c (expand_vec_perm_pshufb): Handle 64bit modes for TARGET_XOP. Use indirect gen_* functions. * config/i386/mmx.md (mmx_ppermv64): New insn pattern. * config/i386/i386.md (unspec): Move UNSPEC_XOP_PERMUTE from ... * config/i386/sse.md (unspec): ... here.
