https://gcc.gnu.org/bugzilla/show_bug.cgi?id=101007
--- Comment #5 from CVS Commits <cvs-commit at gcc dot gnu.org> --- The master branch has been updated by Jakub Jelinek <ja...@gcc.gnu.org>: https://gcc.gnu.org/g:a984da88a35b42f444d1f9eeba77aa520b950d35 commit r12-1385-ga984da88a35b42f444d1f9eeba77aa520b950d35 Author: Jakub Jelinek <ja...@redhat.com> Date: Fri Jun 11 12:58:22 2021 +0200 i386: Fix up *vec_concat<mode>_0_1 [PR101007] On Fri, Apr 23, 2021 at 12:53:58PM +0800, Hongtao Liu via Gcc-patches wrote: > -(define_insn "*vec_concatv4si_0" > - [(set (match_operand:V4SI 0 "register_operand" "=v,x") > - (vec_concat:V4SI > - (match_operand:V2SI 1 "nonimmediate_operand" "vm,?!*y") > - (match_operand:V2SI 2 "const0_operand" " C,C")))] > +(define_insn "*vec_concat<mode>_0" > + [(set (match_operand:VI124_128 0 "register_operand" "=v,x") > + (vec_concat:VI124_128 > + (match_operand:<ssehalfvecmode> 1 "nonimmediate_operand" "vm,?!*y") > + (match_operand:<ssehalfvecmode> 2 "const0_operand" " C,C")))] > "TARGET_SSE2" > "@ > %vmovq\t{%1, %0|%0, %1} > @@ -22154,6 +22157,24 @@ (define_insn "avx_vec_concat<mode>" > (set_attr "prefix" "maybe_evex") > (set_attr "mode" "<sseinsnmode>")]) > > +(define_insn_and_split "*vec_concat<mode>_0" > + [(set (match_operand:V 0 "register_operand") > + (vec_select:V > + (vec_concat:<ssedoublevecmode> > + (match_operand:V 1 "nonimmediate_operand") > + (match_operand:V 2 "const0_operand")) > + (match_parallel 3 "movq_parallel" > + [(match_operand 4 "const_int_operand")])))] > + "ix86_pre_reload_split ()" > + "#" > + "&& 1" > + [(set (match_dup 0) > + (vec_concat:V (match_dup 1) (match_dup 5)))] > +{ > + operands[1] = gen_lowpart (<ssehalfvecmode>mode, operands[1]); > + operands[5] = CONST0_RTX (<ssehalfvecmode>mode); > +}) This regressed the following testcase with -msse -mno-sse2. The define_insn_and_split splits the permutation into *vec_concat<mode>_0 or *vec_concatv2di_0 insns which both have TARGET_SSE2 in their conditions (for the former you can see it above), but the define_insn_and_split matches always when the V mode's condition do, which for V16QI/V8HI/V4SI/V2DI/V4SF modes is always (well, when those modes are valid, which is TARGET_SSE). 2021-06-11 Jakub Jelinek <ja...@redhat.com> PR target/101007 * config/i386/sse.md (*vec_concat<mode>_0_1): Require TARGET_SSE2. * gcc.target/i386/sse-pr101007.c: New test.
