https://gcc.gnu.org/bugzilla/show_bug.cgi?id=100885
--- Comment #2 from Hongtao.liu <crazylht at gmail dot com> --- > With avx512vl Yw should be matched, and w/o avx512bw, only SSE_REGS should > be matched, why xmm16 is allocated? It didn't come from RA, but post_reload splitter. 18103(define_insn_and_split "*sse4_1_zero_extendv8qiv8hi2_3" 18104 [(set (match_operand:V16QI 0 "register_operand" "=Yr,*x,v") 18105 (vec_select:V16QI 18106 (vec_concat:V32QI 18107 (match_operand:V16QI 1 "vector_operand" "YrBm,*xBm,vm") 18108 (match_operand:V16QI 2 "const0_operand" "C,C,C")) 18109 (match_parallel 3 "pmovzx_parallel" 18110 [(match_operand 4 "const_int_operand" "n,n,n")])))] 18111 "TARGET_SSE4_1"
