[Bug target/100085] Bad code for union transfer from __float128 to vector types

[rguenth at gcc dot gnu.org via Gcc-bugs]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=100085

Richard Biener <rguenth at gcc dot gnu.org> changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
             Target|                            |powerpc
   Last reconfirmed|                            |2021-04-15
     Ever confirmed|0                           |1
           Keywords|                            |missed-optimization
          Component|rtl-optimization            |target
             Status|UNCONFIRMED                 |NEW

--- Comment #2 from Richard Biener <rguenth at gcc dot gnu.org> ---
RTL expansion for

vui128_t test_xfer_bin128_2_vui128t (__binary128 f128)
{
  vector(1) __int128 unsigned _3;

;;   basic block 2, loop depth 0
;;    pred:       ENTRY
  _3 = VIEW_CONVERT_EXPR<vector(1) __int128 unsigned>(f128_2(D));
  return _3;

power9 (-) vs power8 (+) is

 (note 3 2 6 2 NOTE_INSN_FUNCTION_BEG)
-(insn 6 3 7 2 (set (mem/c:KF (reg/f:DI 112 virtual-stack-vars) [1  S16 A128])
-        (reg/v:KF 118 [ f128 ])) "vec_f128_ppc.h":143:19 -1
-     (nil))
-(insn 7 6 8 2 (set (reg:V1TI 120)
-        (mem/c:V1TI (reg/f:DI 112 virtual-stack-vars) [1  S16 A128]))
"t.c":13:10 -1
+(insn 6 3 7 2 (set (subreg:V1TI (reg:KF 120 [ f128 ]) 0)
+        (rotate:V1TI (subreg:V1TI (reg/v:KF 118 [ f128 ]) 0)
+            (const_int 64 [0x40]))) "vec_f128_ppc.h":143:19 -1
+     (nil))
+(insn 7 6 8 2 (set (mem/c:V1TI (reg/f:DI 112 virtual-stack-vars) [1  S16
A128])
+        (rotate:V1TI (subreg:V1TI (reg:KF 120 [ f128 ]) 0)
+            (const_int 64 [0x40]))) "vec_f128_ppc.h":143:19 -1
+     (nil))
+(insn 8 7 9 2 (set (reg:V2DI 122)
+        (vec_select:V2DI (mem/c:V2DI (reg/f:DI 112 virtual-stack-vars) [1  S16
A128])
+            (parallel [
+                    (const_int 1 [0x1])
+                    (const_int 0 [0])
+                ]))) "t.c":13:10 -1
+     (nil))
+(insn 9 8 10 2 (set (subreg:V2DI (reg:V1TI 121) 0)
+        (vec_select:V2DI (reg:V2DI 122)
+            (parallel [
+                    (const_int 1 [0x1])
+                    (const_int 0 [0])
+                ]))) "t.c":13:10 -1
      (nil))

so power8 avoids the stack but in turn ends up with sth that's not
optimized down the road.