https://gcc.gnu.org/bugzilla/show_bug.cgi?id=99712
Bug ID: 99712
Summary: Cannot elide aggregate parameter setup
Product: gcc
Version: 11.0
Status: UNCONFIRMED
Severity: normal
Priority: P3
Component: rtl-optimization
Assignee: unassigned at gcc dot gnu.org
Reporter: rguenth at gcc dot gnu.org
Target Milestone: ---
On arm32 for
struct X { int a; int b; int c; int d; int e; };
volatile int i;
void bar (struct X);
void foo (struct X x)
{
i = x.a;
// i = x.e;
}
we are not able to elide the argument setup generated by RTL expansion:
foo:
@ args = 20, pretend = 16, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
@ link register save eliminated.
sub sp, sp, #16
sub ip, sp, #4
add sp, sp, #16
stmib ip, {r0, r1, r2, r3}
movw r3, #:lower16:.LANCHOR0
movt r3, #:upper16:.LANCHOR0
str r0, [r3]
bx lr
note the stmib and all the stack slot setup while we were able to CSE
the "load" to r0. It looks like the frame setup is not subject to DSE,
it's generated as
(insn 2 4 3 2 (parallel [
(set (mem/c:SI (reg/f:SI 107 virtual-incoming-args) [2 x+0 S4 A32])
(reg:SI 0 r0))
(set (mem/c:SI (plus:SI (reg/f:SI 107 virtual-incoming-args)
(const_int 4 [0x4])) [2 x+4 S4 A32])
(reg:SI 1 r1))
(set (mem/c:SI (plus:SI (reg/f:SI 107 virtual-incoming-args)
(const_int 8 [0x8])) [2 x+8 S4 A32])
(reg:SI 2 r2))
(set (mem/c:SI (plus:SI (reg/f:SI 107 virtual-incoming-args)
(const_int 12 [0xc])) [2 x+12 S4 A32])
(reg:SI 3 r3))
]) "t.c":7:1 -1
(nil))
(note 3 2 6 2 NOTE_INSN_FUNCTION_BEG)
