https://gcc.gnu.org/bugzilla/show_bug.cgi?id=98856
--- Comment #21 from Uroš Bizjak <ubizjak at gmail dot com> ---
(In reply to Uroš Bizjak from comment #20)
> (In reply to Richard Biener from comment #18)
> > Even on Skylake it's 2 (movq) + 3 (vpinsr), so there it's 6 vs. 3. Not
> > sure if we should somehow do this late somehow (peephole or splitter) since
> > it requires one more %xmm register.
> What happens if you disparage [v]pinsrd alternatives in vec_concatv2di?
Please try this:
diff --git a/gcc/config/i386/sse.md b/gcc/config/i386/sse.md
index db5be59f5b7..edf7b1a3074 100644
--- a/gcc/config/i386/sse.md
+++ b/gcc/config/i386/sse.md
@@ -16043,7 +16043,12 @@
(const_string "maybe_evex")
]
(const_string "orig")))
- (set_attr "mode" "TI,TI,TI,TI,TI,TI,V4SF,V2SF,V2SF")])
+ (set_attr "mode" "TI,TI,TI,TI,TI,TI,V4SF,V2SF,V2SF")
+ (set (attr "preferred_for_speed")
+ (cond [(eq_attr "alternative" "0,1,2,3")
+ (symbol_ref "false")
+ ]
+ (symbol_ref "true")))])
(define_insn "*vec_concatv2di_0"
