https://gcc.gnu.org/bugzilla/show_bug.cgi?id=79173
--- Comment #6 from Michael_S <already5chosen at yahoo dot com> ---
(In reply to Marc Glisse from comment #1)
> We could start with the simpler:
>
> void f(unsigned*__restrict__ r,unsigned*__restrict__ s,unsigned a,unsigned
> b,unsigned c, unsigned d){
> *r=a+b;
> *s=c+d+(*r<a);
> }
>
That works for dual-precision addition, but not for triple or more.
> After combine, we have:
>
> (insn 34 12 20 2 (set (reg:SI 93 [ _15+4 ])
> (ltu:SI (reg:CCC 17 flags)
> (const_int 0 [0]))) 608 {*setcc_si_1_movzbl}
> (expr_list:REG_DEAD (reg:CCC 17 flags)
> (nil)))
>
> (insn 21 20 22 2 (parallel [
> (set (reg:SI 102)
> (plus:SI (reg:SI 37 r8 [ c ])
> (reg:SI 38 r9 [ d ])))
> (clobber (reg:CC 17 flags))
> ]) "a.c":3 213 {*addsi_1}
> (expr_list:REG_DEAD (reg:SI 38 r9 [ d ])
> (expr_list:REG_UNUSED (reg:CC 17 flags)
> (expr_list:REG_DEAD (reg:SI 37 r8 [ c ])
> (nil)))))
>
> (insn 25 24 26 2 (parallel [
> (set (reg:SI 105)
> (plus:SI (reg:SI 102)
> (reg:SI 93 [ _15+4 ])))
> (clobber (reg:CC 17 flags))
> ]) "a.c":3 213 {*addsi_1}
> (expr_list:REG_DEAD (reg:SI 93 [ _15+4 ])
> (expr_list:REG_UNUSED (reg:CC 17 flags)
> (expr_list:REG_DEAD (reg:SI 102)
> (nil)))))
>
> The combine dump says "Trying 21, 34 -> 25:" but the next line is blank and
> it moves on to trying something else.
>
> If I use parentheses *s=c+(d+(*r<a)); and disable reassoc, I get:
>
> Trying 23, 24 -> 25:
> Successfully matched this instruction:
> (parallel [
> (set (reg:SI 105)
> (plus:SI (plus:SI (ltu:SI (reg:CCC 17 flags)
> (const_int 0 [0]))
> (reg:SI 37 r8 [ c ]))
> (reg:SI 38 r9 [ d ])))
> (clobber (reg:CC 17 flags))
> ])
> Instruction not appropriate for target.
>
> I don't know where that target restriction is coming from, but at least we
> seem to be getting somewhere.
>
> If I remove c and keep *s=d+(*r<a), I get
>
> Failed to match this instruction:
> (parallel [
> (set (reg:SI 103)
> (plus:SI (ltu:SI (reg:CCC 17 flags)
> (const_int 0 [0]))
> (reg:SI 38 r9 [ d ])))
> (clobber (reg:CC 17 flags))
> ])
> Failed to match this instruction:
> (set (reg:SI 103)
> (plus:SI (ltu:SI (reg:CCC 17 flags)
> (const_int 0 [0]))
> (reg:SI 38 r9 [ d ])))
>
> we would probably need a special pattern for this case, virtually adding 0.
