https://gcc.gnu.org/bugzilla/show_bug.cgi?id=97506
--- Comment #5 from Hongtao.liu <crazylht at gmail dot com> ---
(In reply to Jakub Jelinek from comment #4)
> Yeah. On the other side, they don't need to try hard to optimize it because
> normally it should be simplified already. So, e.g. the above patch is fine
> if it works, but it would be also fine to force_reg one of the operands into
> register, etc.
Yes, something like, both patches work for this bug.
---
@@ -3552,7 +3545,8 @@ ix86_expand_sse_movcc (rtx dest, rtx cmp, rtx op_true,
rtx op_false)
/* Optimize for mask zero. */
op_true = (op_true != CONST0_RTX (mode)
? force_reg (mode, op_true) : op_true);
- op_false = (op_false != CONST0_RTX (mode)
+ /* Avoid ICE in PR97506 when both op_true and op_false are const0_rtx.
*/
+ op_false = (op_false != CONST0_RTX (mode) || op_true == CONST0_RTX
(mode)
? force_reg (mode, op_false) : op_false);
if (op_true == CONST0_RTX (mode))
---
