https://gcc.gnu.org/bugzilla/show_bug.cgi?id=96759
--- Comment #4 from CVS Commits <cvs-commit at gcc dot gnu.org> --- The master branch has been updated by Kito Cheng <k...@gcc.gnu.org>: https://gcc.gnu.org/g:78fbe731a8822e819c4ca0e6d6f777c7a2f36bad commit r11-3860-g78fbe731a8822e819c4ca0e6d6f777c7a2f36bad Author: Kito Cheng <kito.ch...@sifive.com> Date: Wed Sep 2 14:26:15 2020 +0800 PR target/96759 - Handle global variable assignment from misaligned structure/PARALLEL return values. In g:70cdb21e579191fe9f0f1d45e328908e59c0179e, DECL/global variable has handled misaligned stores, but it didn't handle PARALLEL values, and I refer the other part of this function, I found the PARALLEL need handled by emit_group_* functions, so I add a check, and using emit_group_store if storing a PARALLEL value, also checked this change didn't break the testcase(gcc.target/arm/unaligned-argument-3.c) added by the orginal changes. For riscv64 target, struct S {int a; double b;} will pack into a parallel value to return and it has TImode when misaligned access is supported, however TImode required 16-byte align, but it only 8-byte align, so it go to the misaligned stores handling, then it will try to generate move instruction from a PARALLEL value. Tested on following target without introduced new reguression: - riscv32/riscv64 elf - x86_64-linux - arm-eabi v2 changes: - Use maybe_emit_group_store instead of emit_group_store. - Remove push_temp_slots/pop_temp_slots, emit_group_store only require stack temp slot when dst is CONCAT or PARALLEL, however maybe_emit_group_store will always use REG for dst if needed. gcc/ChangeLog: PR target/96759 * expr.c (expand_assignment): Handle misaligned stores with PARALLEL value. gcc/testsuite/ChangeLog: PR target/96759 * g++.target/riscv/pr96759.C: New. * gcc.target/riscv/pr96759.c: New.
