https://gcc.gnu.org/bugzilla/show_bug.cgi?id=92729
pipcet at gmail dot com changed:
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CC| |pipcet at gmail dot com
--- Comment #5 from pipcet at gmail dot com ---
I'm interested in working on this.
There's some initial code at
https://github.com/gcc-mirror/gcc/compare/master...pipcet:avr-ccmode
I've followed the instructions at https://gcc.gnu.org/wiki/CC0Transition . I
believe AVR is an architecture which fits case #2 best: reload requires
arithmetic insns which clobber condition codes.
I decided to add explicit CC clobbers to the patterns for most insns rather
than relying on a post-reload splitter adding the CC clobbers, mostly because
that seemed simpler.
I've used a single REG_CC register in an 8-bit CCmode, representing all bits of
SREG except for the interrupt flag. (Once things are up and running, I plan to
investigate whether it's worth it to treat the carry flag and the transfer bit
separately).
The current state is that most code, particularly the gcc.c-torture/compile/
collection, appears to compile, but I haven't run the execution tests to figure
out what's working and what isn't.
