https://gcc.gnu.org/bugzilla/show_bug.cgi?id=94665
Segher Boessenkool <segher at gcc dot gnu.org> changed:
What |Removed |Added
----------------------------------------------------------------------------
Status|RESOLVED |REOPENED
Resolution|INVALID |---
--- Comment #9 from Segher Boessenkool <segher at gcc dot gnu.org> ---
Okay, native aarch64 compiler built. Phew.
vara, varb, varc are in regs r92, r93, r94. The code before combine is:
37: cc:CCFPE=cmp(r92:SF,r93:SF)
38: r93:SF={(cc:CCFPE<0)?r93:SF:r92:SF}
REG_DEAD r92:SF
REG_DEAD cc:CCFPE
39: cc:CCFPE=cmp(r94:SF,r93:SF)
40: r94:SF={(cc:CCFPE<0)?r94:SF:r93:SF}
REG_DEAD r93:SF
REG_DEAD cc:CCFPE
and it leaves 37+38 as it was:
Trying 37 -> 38:
37: cc:CCFPE=cmp(r92:SF,r93:SF)
38: r93:SF={(cc:CCFPE<0)?r93:SF:r92:SF}
REG_DEAD r92:SF
REG_DEAD cc:CCFPE
Failed to match this instruction:
(set (reg:SF 93 [ _2 ])
(if_then_else:SF (lt (reg:SF 92 [ _1 ])
(reg:SF 93 [ _2 ]))
(reg:SF 93 [ _2 ])
(reg:SF 92 [ _1 ])))
but it combines 39+40:
Trying 39 -> 40:
39: cc:CCFPE=cmp(r94:SF,r93:SF)
40: r94:SF={(cc:CCFPE<0)?r94:SF:r93:SF}
REG_DEAD r93:SF
REG_DEAD cc:CCFPE
Successfully matched this instruction:
(set (reg:SF 94 [ _4 ])
(smin:SF (reg:SF 94 [ _4 ])
(reg:SF 93 [ _2 ])))
allowing combination of insns 39 and 40
original costs 4 + 4 = 8
replacement cost 8
deferring deletion of insn with uid = 39.
modifying insn i3 40: r94:SF=smin(r94:SF,r93:SF)
REG_DEAD r93:SF
deferring rescan insn with uid = 40.
So huh, simplify_if_then_else seems to be buggy:
/* Look for MIN or MAX. */
if ((! FLOAT_MODE_P (mode) || flag_unsafe_math_optimizations)
&& comparison_p
&& rtx_equal_p (XEXP (cond, 0), true_rtx)
&& rtx_equal_p (XEXP (cond, 1), false_rtx)
&& ! side_effects_p (cond))
that isn't correct afaics?
