https://gcc.gnu.org/bugzilla/show_bug.cgi?id=94037
--- Comment #4 from Richard Biener <rguenth at gcc dot gnu.org> --- (In reply to Uroš Bizjak from comment #3) > (In reply to Jakub Jelinek from comment #2) > > The > > setge %sil > > movzbl %sil, %esi > > to > > xorl %esi, %esi > > setge %sil > > This is quite important conversion, as the later avoids partial register > stall. Couldn't we fix this by pretending setge and friends produce SImode and always emit xor + setCC? So not rely on a peephole but emit the xor already during RTL expansion, eventually eliding it later if that's ever necessary.
