https://gcc.gnu.org/bugzilla/show_bug.cgi?id=92902
--- Comment #15 from Jean-Christophe Dubois <gcc at tribudubois dot net> --- Thanks for the feedback and the support. Now maybe this is not the good place to ask question but I am wondering: Most of today's processors have separate data and instruction cache. Isn't it sub optimal performance wise to load the instruction cache with jump tables (just data consuming precious cache resource) and then having to load these same jump tables again in the data cache to use them (jump tables might then be loaded twice and eat instruction cache for no reason). If there were only processors with unified cache this would not be an issue but this is not the most common case in today's processors. Am I missing something? Shouldn't most architecture put jump tables in rodata section. Thanks JC
