https://gcc.gnu.org/bugzilla/show_bug.cgi?id=91117
--- Comment #2 from Wolf . <wolfwings+gcc at gmail dot com> --- Is there any way to still access MMX instructions/registers with intrinsics in gcc-10 at all or is this bug "fixable but that code generation option will go away entirely with gcc-10 so it wouldn't matter" then? The full code block I found this hiccup in was running out of SSE registers on the pre-AVX Silvermont platform it's on (so no 3-op VEX available) so I moved some early operations to MMX registers instead. This freed up all register pressure, allowing the constants used to stay in-register for the full processing loop and avoiding almost all spills/stalls, which is where I found this hiccup in the first place.
