https://gcc.gnu.org/bugzilla/show_bug.cgi?id=90510
--- Comment #2 from Richard Biener <rguenth at gcc dot gnu.org> --- So we have (insn 10 9 11 2 (set (reg:V2DF 92) (vec_duplicate:V2DF (reg/v:DF 84 [ tem ]))) "t.c":8:42 2984 {vec_dupv2df} (expr_list:REG_DEAD (reg/v:DF 84 [ tem ]) (nil))) (insn 11 10 16 2 (set (reg:V2DF 91) (vec_merge:V2DF (reg:V2DF 92) (reg/v:V2DF 87 [ x ]) (const_int 1 [0x1]))) "t.c":8:10 2983 {sse2_movsd} (expr_list:REG_DEAD (reg:V2DF 92) (expr_list:REG_DEAD (reg/v:V2DF 87 [ x ]) (nil)))) and nothing figures out insn 10 is unnecessary because the upper half of 92 is dead. I somehow expected combine/simplify-rtx to merge these but I guess without target support it is hard to see that sse2_movsd can handle sth like a paradoxical vector subreg of the scalar: (insn 11 10 16 2 (set (reg:V2DF 91) (vec_merge:V2DF (subreg:V2DF (reg:DF 84) 0) (reg/v:V2DF 87 [ x ]) (const_int 1 [0x1]))) "t.c":8:10 2983 {sse2_movsd} (expr_list:REG_DEAD (reg:V2DF 92) (expr_list:REG_DEAD (reg/v:V2DF 87 [ x ]) (nil)))) Now we can pattern-match both _4 = BIT_FIELD_REF <x_7(D), 64, 64>; z_6 = {_3, _4}; and _7 = {_3, _3}; z_6 = VEC_PERM_EXPR <x_4(D), _7, { 2, 1 }>; to z_6 = BIT_INSERT_EXPR <x_4(D), _3, 0> which we can hope to be expanded better.