https://gcc.gnu.org/bugzilla/show_bug.cgi?id=87599
--- Comment #1 from Andrew Pinski <pinskia at gcc dot gnu.org> --- Try with -mtune=intel. So AMD cores are faster with the move between gpr and sse register sets via memory rather than direct
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=87599
--- Comment #1 from Andrew Pinski <pinskia at gcc dot gnu.org> --- Try with -mtune=intel. So AMD cores are faster with the move between gpr and sse register sets via memory rather than direct