https://gcc.gnu.org/bugzilla/show_bug.cgi?id=87400
Bug ID: 87400
Summary: GCC doesn't produce valid frames for stack traces with
Thumb-2 (Cortex-M3+)
Product: gcc
Version: 7.3.1
Status: UNCONFIRMED
Severity: normal
Priority: P3
Component: c
Assignee: unassigned at gcc dot gnu.org
Reporter: alexkalmuk at gmail dot com
Target Milestone: ---
Target: arm-none-eabi
GCC generates special frames for doing stack traces on ARM. These frames can be
generated for ARM instruction set using `-mapcs-frame`:
Example of the produced frame:
$ arm-none-eabi-gcc -marm -mcpu=arm926ej-s -march=armv5te -mapcs-frame
--specs=nosys.specs -o test test.c
000081f8 <my_func>:
81f8: e1a0c00d mov ip, sp
81fc: e92dd800 push {fp, ip, lr, pc}
This type of prologue can be also generated for Cortex-M (thumb instruction
set) using `-mthumb -mcpu=cortex-m1 -mtpcs-frame -mtpcs-leaf-frame`:
$ arm-none-eabi-gcc -mthumb -mcpu=cortex-m1 -mtpcs-frame -mtpcs-leaf-frame
--specs=nosys.specs -o test test.c
In that case function prologue will look like:
00008104 <my_func>:
8104: b084 sub sp, #16
8106: b580 push {r7, lr}
8108: aa06 add r2, sp, #24
810a: 9203 str r2, [sp, #12]
810c: 467a mov r2, pc
810e: 9205 str r2, [sp, #20]
8110: 465a mov r2, fp
8112: 9202 str r2, [sp, #8]
It's the same thing like for ARM instruction set, but since Thumb doesn't allow
to push high registers, GCC produces it through mov/str instructions.
But in case of `-mcpu=cortex-m3` (instead of `-mcpu=cortex-m1`), we do not get
such prologue. After investigating gcc/config/arm/arm.c, I figured out that
these prologues are generated only for Thumb-1 (Cortex-M0/M1) and ARM
instruction sets, but ingnored for Thumb-2 (Cortex-M3+). It is a bug, or there
is some reason do not generate these prologues for Thumb-2?
