https://gcc.gnu.org/bugzilla/show_bug.cgi?id=80546
Jakub Jelinek <jakub at gcc dot gnu.org> changed:
What |Removed |Added
----------------------------------------------------------------------------
CC| |jakub at gcc dot gnu.org
--- Comment #3 from Jakub Jelinek <jakub at gcc dot gnu.org> ---
With somewhat older revisions when -mno-lra still existed xxlnor wouldn't
appear with that option.
Anyway, isn't the problem already in IRA?
We have:
(insn 9 16 10 2 (parallel [
(set (reg:TI 125 [ a ])
(asm_operands:TI ("# gpr reg %0") ("=r") 0 [
(reg:TI 125 [ a ])
]
[
(asm_input:TI ("0") bool3.h:74)
]
[] bool3.h:74))
(clobber (reg:SI 76 ca))
]) "bool3.h":74 -1
(expr_list:REG_UNUSED (reg:SI 76 ca)
(nil)))
(insn 10 9 17 2 (set (reg/v:TI 122 [ b ])
(not:TI (reg:TI 125 [ a ]))) "bool3.h":75 493 {*one_cmplti3_internal}
(expr_list:REG_DEAD (reg:TI 125 [ a ])
(nil)))
(insn 17 10 12 2 (set (reg:TI 126 [ b ])
(reg/v:TI 122 [ b ])) "bool3.h":76 1197 {*vsx_movti_64bit}
(expr_list:REG_DEAD (reg/v:TI 122 [ b ])
(nil)))
(insn 12 17 13 2 (parallel [
(set (reg:TI 126 [ b ])
(asm_operands:TI ("# gpr reg %0") ("=r") 0 [
(reg:TI 126 [ b ])
]
[
(asm_input:TI ("0") bool3.h:76)
]
[] bool3.h:76))
(clobber (reg:SI 76 ca))
]) "bool3.h":76 -1
(expr_list:REG_UNUSED (reg:SI 76 ca)
(nil)))
and
r126: preferred GENERAL_REGS, alternative NO_REGS, allocno GENERAL_REGS
r125: preferred GENERAL_REGS, alternative NO_REGS, allocno GENERAL_REGS
r124: preferred BASE_REGS, alternative GENERAL_REGS, allocno GENERAL_REGS
r123: preferred BASE_REGS, alternative GENERAL_REGS, allocno GENERAL_REGS
r122: preferred VSX_REGS, alternative NO_REGS, allocno VSX_REGS
r121: preferred VSX_REGS, alternative NO_REGS, allocno VSX_REGS
a0(r123,l0) costs: BASE_REGS:0,0 GENERAL_REGS:4000,4000
FLOAT_REGS:24000,24000 ALTIVEC_REGS:24000,24000 VSX_REGS:24000,24000
NON_SPECIAL_REGS:24000,24000 LINK_REGS:18000,18000 CTR_REGS:18000,18000
LINK_OR_CTR_REGS:18000,18000 SPEC_OR_GEN_REGS:18000,18000 ALL_REGS:62000,62000
MEM:12000,12000
a1(r126,l0) costs: GENERAL_REGS:8000,8000 FLOAT_REGS:48000,48000
ALTIVEC_REGS:48000,48000 VSX_REGS:48000,48000 NON_SPECIAL_REGS:54000,54000
ALL_REGS:148000,148000 MEM:35000,35000
a2(r122,l0) costs: BASE_REGS:26000,26000 GENERAL_REGS:26000,26000
FLOAT_REGS:20000,20000 ALTIVEC_REGS:20000,20000 VSX_REGS:20000,20000
NON_SPECIAL_REGS:38000,38000 ALL_REGS:74000,74000 MEM:23000,23000
a3(r125,l0) costs: GENERAL_REGS:18000,18000 FLOAT_REGS:48000,48000
ALTIVEC_REGS:48000,48000 VSX_REGS:48000,48000 NON_SPECIAL_REGS:64000,64000
ALL_REGS:172000,172000 MEM:41000,41000
a4(r121,l0) costs: BASE_REGS:26000,26000 GENERAL_REGS:26000,26000
FLOAT_REGS:8000,8000 ALTIVEC_REGS:8000,8000 VSX_REGS:8000,8000
NON_SPECIAL_REGS:26000,26000 ALL_REGS:46000,46000 MEM:11000,11000
a5(r124,l0) costs: BASE_REGS:0,0 GENERAL_REGS:2000,2000
FLOAT_REGS:16000,16000 ALTIVEC_REGS:16000,16000 VSX_REGS:16000,16000
NON_SPECIAL_REGS:16000,16000 LINK_REGS:12000,12000 CTR_REGS:12000,12000
LINK_OR_CTR_REGS:12000,12000 SPEC_OR_GEN_REGS:12000,12000 ALL_REGS:48000,48000
MEM:8000,8000
I wonder how it could come up with so huge costs of BASE_REGS/GENERAL_REGS for
r122.
It is used just in:
(define_insn ("*one_cmplti3_internal")
[
(set (match_operand:TI 0 ("vlogical_operand") ("=&r,r,r,wt,v"))
(not:TI (match_operand:TI 1 ("vlogical_operand") ("r,0,0,wt,v"))))
] ("") ("*{
if (TARGET_VSX && vsx_register_operand (operands[0], TImode))
return "xxlnor %x0,%x1,%x1";
if (TARGET_ALTIVEC && altivec_register_operand (operands[0], TImode))
return "vnor %0,%1,%1";
return "#";
}")
and
(define_insn ("*vsx_movti_64bit")
[
(set (match_operand:TI 0 ("nonimmediate_operand") ("=ZwO, wt,
wt, r, we, ?wQ,
?&r, ??r, ??Y, ??r, wo, v,
?wt, *r, v, ??r, wZ, v"))
(match_operand:TI 1 ("input_operand") ("wt, ZwO, wt,
we, r, r,
wQ, Y, r, r, wE, jwM,
?jwM, jwM, W, W, v, wZ")))
] ("TARGET_POWERPC64 && VECTOR_MEM_VSX_P (TImode)
&& (register_operand (operands[0], TImode)
|| register_operand (operands[1], TImode))") ("*{
return rs6000_output_move_128bit (operands);
}")
Is that because of the ??r/??r in the *vsx_movti_64bit instruction?
