https://gcc.gnu.org/bugzilla/show_bug.cgi?id=81550
--- Comment #11 from Michael Meissner <meissner at gcc dot gnu.org> --- Author: meissner Date: Mon Jan 29 22:30:34 2018 New Revision: 257166 URL: https://gcc.gnu.org/viewcvs?rev=257166&root=gcc&view=rev Log: 2018-01-29 Michael Meissner <meiss...@linux.vnet.ibm.com> PR target/81550 * config/rs6000/rs6000.c (rs6000_setup_reg_addr_masks): If DFmode and SFmode can go in Altivec registers (-mcpu=power7 for DFmode, -mcpu=power8 for SFmode) don't set the PRE_INCDEC or PRE_MODIFY flags. This restores the settings used before the 2017-07-24. Turning off pre increment/decrement/modify allows IVOPTS to optimize DF/SF loops where the index is an int. Modified: trunk/gcc/ChangeLog trunk/gcc/config/rs6000/rs6000.c