https://gcc.gnu.org/bugzilla/show_bug.cgi?id=83565
--- Comment #17 from James Clarke <jrtc27 at jrtc27 dot com> --- (In reply to Eric Botcazou from comment #15) > > Thanks Jim, that makes sense. It seems to me that WORD_REGISTER_OPERATIONS > > should still be true on ia64 given the description in the documentation. > > I disagree, WORD_REGISTER_OPERATIONS means that the (general) registers are > always modified as a whole by arithmetic operations. If that isn't the > case, then the macro should not be defined (e.g Aarch64 doesn't define it > although ARM does). Ok, fair enough, the docs are all I have to go on, as opposed to your existing knowledge of the codebase. > > This regression was introduced in r242326, which added the `&& !REG_P > > (SUBREG_REG (x))` to nonzero_bits1, thereby assuming that the high bits were > > defined, which is a target-specific assumption. > > No, see above, WORD_REGISTER_OPERATIONS means that the bits are defined. Well, yes and no, then. The regression on ia64 *was* introduced then, but only because of what you believe to be the existing incorrect use of WORD_REGISTER_OPERATIONS. I doubt there's much more I can contribute to this bug myself as I lack the knowledge of what is meant to happen deep inside GCC, but certainly I can confirm that the issue is with nonzero_bits returning only the lower 32 bits due to that if condition.
