https://gcc.gnu.org/bugzilla/show_bug.cgi?id=82015

--- Comment #4 from Aldy Hernandez <aldyh at gcc dot gnu.org> ---
Author: aldyh
Date: Wed Sep 13 17:39:41 2017
New Revision: 252622

URL: https://gcc.gnu.org/viewcvs?rev=252622&root=gcc&view=rev
Log:
[gcc]
2017-08-29  Michael Meissner  <meiss...@linux.vnet.ibm.com>

        PR target/82015
        * config/rs6000/rs6000.c (rs6000_expand_binop_builtin): Insure
        that the second argument of the built-in functions to unpack
        128-bit scalar types to 64-bit values is 0 or 1.  Change to use a
        switch statement instead a lot of if statements.
        * config/rs6000/rs6000.md (unpack<mode>, FMOVE128_VSX iterator):
        Allow 64-bit values to be in Altivec registers as well as
        traditional floating point registers.
        (pack<mode>, FMOVE128_VSX iterator): Likewise.

[gcc/testsuite]
2017-08-29  Michael Meissner  <meiss...@linux.vnet.ibm.com>

        PR target/82015
        * gcc.target/powerpc/pr82015.c: New test.

Added:
    branches/range-gen2/gcc/testsuite/gcc.target/powerpc/pr82015.c
Modified:
    branches/range-gen2/gcc/ChangeLog
    branches/range-gen2/gcc/config/rs6000/rs6000.c
    branches/range-gen2/gcc/config/rs6000/rs6000.md
    branches/range-gen2/gcc/testsuite/ChangeLog

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