[Bug target/72804] Poor code gen with -mvsx-timode

Wed, 13 Sep 2017 10:07:30 -0700 

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=72804

--- Comment #10 from Aldy Hernandez <aldyh at gcc dot gnu.org> ---
Author: aldyh
Date: Wed Sep 13 17:06:33 2017
New Revision: 252468

URL: https://gcc.gnu.org/viewcvs?rev=252468&root=gcc&view=rev
Log:
gcc/
        PR target/72804
        * config/rs6000/vsx.md (*vsx_le_permute_<mode>): Add support for
        operands residing in integer registers.
        (*vsx_le_perm_load_<mode>): Likewise.
        (*vsx_le_perm_store_<mode>): Likewise.
        (define_peephole2): Add peepholes to optimize the above.

gcc/testsuite/
        PR target/72804
        * gcc.target/powerpc/pr72804.c: New test.

Added:
    branches/range-gen2/gcc/testsuite/gcc.target/powerpc/pr72804.c
Modified:
    branches/range-gen2/gcc/ChangeLog
    branches/range-gen2/gcc/config/rs6000/vsx.md
    branches/range-gen2/gcc/testsuite/ChangeLog

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