https://gcc.gnu.org/bugzilla/show_bug.cgi?id=46091
--- Comment #8 from Uroš Bizjak <ubizjak at gmail dot com> --- (In reply to Uroš Bizjak from comment #7) > From i386.md: > > ;; %%% bts, btr, btc, bt. > ;; In general these instructions are *slow* when applied to memory, > ;; since they enforce atomic operation. When applied to registers, > ;; it depends on the cpu implementation. They're never faster than > ;; the corresponding and/ior/xor operations, so with 32-bit there's > ;; no point. But in 64-bit, we can't hold the relevant immediates > ;; within the instruction itself, so operating on bits in the high > ;; 32-bits of a register becomes easier. atomics involving btr/bts/btc were implemented a while ago for PR49244.
