https://gcc.gnu.org/bugzilla/show_bug.cgi?id=80491
Jakub Jelinek <jakub at gcc dot gnu.org> changed:
What |Removed |Added
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CC| |segher at gcc dot gnu.org
--- Comment #6 from Jakub Jelinek <jakub at gcc dot gnu.org> ---
Segher, any idea what can be done about the second (combiner) issue?
Is it possible to special case MODE_CC class hard registers that are just
clobbered on the i2 insn using a separate clobber in a parallel (so the
single_set in that case which is what we try to substitute doesn't clobber it)
and not in insns in between i1 and i2 and i2 and i3?
