https://gcc.gnu.org/bugzilla/show_bug.cgi?id=79581
--- Comment #4 from PeteVine <tulipawn at gmail dot com> --- > Judging by your -mcpu option is this on a Cortex-A5? Yes, if you look at the results on a Cortex A53 running armv7 code, it doesn't reproduce either, and A5-codegen is king :) (hopefully due to in-order design or sth) https://gcc.gnu.org/bugzilla/show_bug.cgi?id=53659#c12 A quick question regarding -mcpu=cortex-a5 codegen; is there a similar switch to llvm's `-slowfpvmlx` feature? (disable slow vmla/vmls), which the nice ARM guy divulged here: https://bugs.llvm.org//show_bug.cgi?id=26135#c9 or is it a non-issue in gcc?
