https://gcc.gnu.org/bugzilla/show_bug.cgi?id=78671
--- Comment #3 from Vladimir Makarov <vmakarov at gcc dot gnu.org> --- (In reply to Jakub Jelinek from comment #2) > Started with r243038. It has just triggered a latent bug. It is a pretty interesting bug. The problem is that a TImode pseudo has class INT_SSE_REGS and r15(44) smoothly goes to xmm8 (45). So using available regs in LRA, r15 is ok for the pseudo. Actually on machine-depended side, a more detail implementation HARD_REGNO_MODE_OK could solve the problem. But it is too complicated and error prone and require a lot of efforts to define the macro accurately for all classes and modes. I think I'll use the same solution as IRA does which is based on usage of the register pressure classes which is based on hard reg cost movements (moving from sse to/from general regs is more expensive than just inside sse or general regs). I hope the patch will be ready by Friday.
