https://gcc.gnu.org/bugzilla/show_bug.cgi?id=78658
--- Comment #2 from Michael Meissner <meissner at gcc dot gnu.org> --- Author: meissner Date: Tue Dec 6 22:15:31 2016 New Revision: 243320 URL: https://gcc.gnu.org/viewcvs?rev=243320&root=gcc&view=rev Log: [gcc] 2016-12-06 Michael Meissner <meiss...@linux.vnet.ibm.com> PR target/78658 * config/rs6000/rs6000.md (zero_extendqi<mode>2): Use ^ instead of ?* constraints for the ISA 3.0 patterns, so the register allocator is more likely to allocate QImode/HImode to vector registers for conversion to floating point unless a reload is needed. (zero_extendhi<mode>2): Likewise. (float<QHI:mode><FP_ISA3:mode>2_internal): Properly deal with the first alternative which is converting QImode/HImode to floating point and the QImode/HImode value is in a vector register, and does not allocate the second pseudo register. Remove zero extending into traditional floating point registers, since the instruction used only works on traditional altivec registers. (floatuns<QHI:mode><FP_ISA3:mode>2_internal): Likewise. [gcc/testsuite] 2016-12-06 Michael Meissner <meiss...@linux.vnet.ibm.com> PR target/78658 * gcc.target/powerpc/pr78658.c: New test. Added: trunk/gcc/testsuite/gcc.target/powerpc/pr78658.c Modified: trunk/gcc/ChangeLog trunk/gcc/config/rs6000/rs6000.md trunk/gcc/testsuite/ChangeLog
