https://gcc.gnu.org/bugzilla/show_bug.cgi?id=78397
Bug ID: 78397
Summary: The stack is not 8 bytes aligned on ARM
Product: gcc
Version: 5.4.0
Status: UNCONFIRMED
Severity: normal
Priority: P3
Component: target
Assignee: unassigned at gcc dot gnu.org
Reporter: alexandre.martins at stormshield dot eu
Target Milestone: ---
Host: armv5te
Target: armv5te
Build: armv5te
Created attachment 40067
--> https://gcc.gnu.org/bugzilla/attachment.cgi?id=40067&action=edit
Demo C file to reproduce the bug
Greetings
I'm currently developing on an ARMv5te platform on FreeBSD 10.3. I'm mixing
code compiled by clang 3.4 (libc, rtld, ...) and by gcc 5.4.0 (my program).
Time to time, an assertion in the rtld of FreeBSD warn us that a lock is not in
a consistent state. The lock is stored on the stack, so I suspect stack
corruption.
After few hours of digging, I see that clang assume that the stack is 8 bytes
aligned (as
http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.faqs/ka4127.html
say) and perform some optimisations (?) on pointer computations. In my problem,
too add 4 to an address supposed to be 8 bytes aligned, clang produce : "orr
r0, r0, #4". It's working well when the stack is 8 bytes aligned, but not when
it's 4 bytes aligned.
Unfortunately, some of my code, when compiled with GCC and optimised, unalign
the stack. You will find the source code and the assembly in attached file.
