https://gcc.gnu.org/bugzilla/show_bug.cgi?id=71077
--- Comment #7 from Yuri Rumyantsev <ysrumyan at gmail dot com> --- I checked that proposed patch fixed RF for 176.gcc. Please, go ahead and commit your patch to trunk. Thanks. Yuri. 2016-08-12 20:14 GMT+03:00 patrick at parcs dot ath.cx <gcc-bugzi...@gcc.gnu.org>: > https://gcc.gnu.org/bugzilla/show_bug.cgi?id=71077 > > --- Comment #6 from patrick at parcs dot ath.cx --- > On Fri, 12 Aug 2016, ysrumyan at gmail dot com wrote: > >> https://gcc.gnu.org/bugzilla/show_bug.cgi?id=71077 >> >> Yuri Rumyantsev <ysrumyan at gmail dot com> changed: >> >> What |Removed |Added >> ---------------------------------------------------------------------------- >> CC| |ysrumyan at gmail dot com >> >> --- Comment #5 from Yuri Rumyantsev <ysrumyan at gmail dot com> --- >> We found out that after r235653 with minor change of int->bool type 176.gcc >> still RF on HSW machine in 32-bit if opt level equal 3. If we turn off VRP >> phase by -fno-tree-vrp option benchmark is passed. Need to understand why >> this >> simplification affects on it. > > My only guess is that the combining step still doesn't handle > VECTOR_CSTs correctly. Could you please check if this patch fixes the > runtime failure? > > diff --git a/gcc/tree-ssa-threadedge.c b/gcc/tree-ssa-threadedge.c > index 170e456..0db7bda 100644 > --- a/gcc/tree-ssa-threadedge.c > +++ b/gcc/tree-ssa-threadedge.c > @@ -577,6 +577,7 @@ simplify_control_stmt_condition_1 (edge e, > if (handle_dominating_asserts > && (cond_code == EQ_EXPR || cond_code == NE_EXPR) > && TREE_CODE (op0) == SSA_NAME > + && INTEGRAL_TYPE_P (TREE_TYPE (op0)) > && integer_zerop (op1)) > { > gimple *def_stmt = SSA_NAME_DEF_STMT (op0); > > -- > You are receiving this mail because: > You are on the CC list for the bug.
