https://gcc.gnu.org/bugzilla/show_bug.cgi?id=71763
--- Comment #7 from Segher Boessenkool <segher at gcc dot gnu.org> --- (In reply to Michael Meissner from comment #6) > Note if you put the requirement that you need direct move, you will > potentially have the problem in power7. Yes; we have that same problem for FPRs already, see PR70098. > I'm really tired of the register allocator trying to be 'helpful' in > de-optimizing BDNZ loops by spilling the index to the FP registers (and now > Altivec registers). I've seen instances of this popping up for at least the > last 7 years. Maybe it should always split an allocno where used in a jump insn? The ctr* patterns can then just always require a GPR (or ctr). Or something like Alan's output-reload-on-jump-insns patch. Or, we should just not generate ctr* if it isn't allocated the ctr reg! It is *supposed* to not do that, but still it often does.
