https://gcc.gnu.org/bugzilla/show_bug.cgi?id=69677
--- Comment #16 from Uroš Bizjak <ubizjak at gmail dot com> --- (In reply to Ilya Enkovich from comment #15) > (In reply to Jakub Jelinek from comment #13) > > Fixed. > > I think you just hide LRA issue disabling STV and LRA still may generate > incorrect register fill Yes, but stage 4 is not the time to solve these kind of bugs. As said, the fix disables STV for rare and unusual cases. I expect that proper fix will be developed during gcc-7 time, and this includes various RA fixes. Previous patch relaxed alignment requirements to 64 bits, and this triggered RA bug. So, unless we want to delay release for a couple of weeks (a month?), we will leave alignment to 128 bits. That doesn't mean that incorrect register fill RA bug should't be fixed during stage-4. Do we have a small testcase that exposes it?
