https://gcc.gnu.org/bugzilla/show_bug.cgi?id=36557

--- Comment #4 from Segher Boessenkool <segher at gcc dot gnu.org> ---
We now do

        cntlzw 3,3
        srwi 3,3,5
        xori 3,3,0x1
        blr

which is still not optimal (and not what -m32 / -m32 -mpowerpc64 do).

Reply via email to