https://gcc.gnu.org/bugzilla/show_bug.cgi?id=65153
Oleg Endo <olegendo at gcc dot gnu.org> changed:
What |Removed |Added
----------------------------------------------------------------------------
CC| |kkojima at gcc dot gnu.org
--- Comment #4 from Oleg Endo <olegendo at gcc dot gnu.org> ---
(insn 143 142 144 12 (set (reg/v:SI 7 r7 [orig:227 t ] [227])
(ior:SI (reg:SI 1 r1)
(reg:SI 13 r13 [orig:718 D.4992 ] [718]))) cast-256.c:387 130
{*iorsi3_compact}
(expr_list:REG_DEAD (reg:SI 13 r13 [orig:718 D.4992 ] [718])
(nil)))
This is an impossible register allocation for the insn. It allows only 2
different regs but there are 3 different regs assigned. I've seen this
somewhere before ... but I can't recall where. Kaz do you remember anything
like that?
