https://gcc.gnu.org/bugzilla/show_bug.cgi?id=61397
--- Comment #4 from Michael Meissner <meissner at gcc dot gnu.org> --- I put a LP64 on the test, because it was using 64-bit shifts in order to force registers to be allocated from the Altivec register set. If you compile it in 32-bit mode, the emulation of 64-bit shifts/masks can complicate things.
