https://gcc.gnu.org/bugzilla/show_bug.cgi?id=64435
--- Comment #18 from Andrew Pinski <pinskia at gcc dot gnu.org> ---
(In reply to Jakub Jelinek from comment #17)
> PPC64 actually supports both 44 and 46 bit address space:
>
> uptr GetMaxVirtualAddress() {
> #if SANITIZER_WORDSIZE == 64
> # if defined(__powerpc64__)
> // On PowerPC64 we have two different address space layouts: 44- and
> 46-bit.
> // We somehow need to figure out which one we are using now and choose
> // one of 0x00000fffffffffffUL and 0x00003fffffffffffUL.
> // Note that with 'ulimit -s unlimited' the stack is moved away from the
> top
> // of the address space, so simply checking the stack address is not
> enough.
> // This should (does) work for both PowerPC64 Endian modes.
> return (1ULL << (MostSignificantSetBitIndex(GET_CURRENT_FRAME()) + 1)) - 1;
> # elif defined(__aarch64__)
> return (1ULL << 39) - 1;
> # elif defined(__mips64)
> return (1ULL << 40) - 1;
...
> it is just that aarch64 hardcodes this right now. Suppose doing something
> like ppc64 does could work.
Even though this is not listed here and does not really belong in this bug but
MIPS64 should be done the same way since it has many different virtual address
sizes as it has many different page sizes too (4k, 8k, 16k, 32k, and 64k). I
wonder why ASAN folks don't just always use the way PowerPC is done.
