http://gcc.gnu.org/bugzilla/show_bug.cgi?id=60735
--- Comment #8 from Bill Schmidt <wschmidt at gcc dot gnu.org> --- Author: wschmidt Date: Tue Apr 15 18:25:09 2014 New Revision: 209426 URL: http://gcc.gnu.org/viewcvs?rev=209426&root=gcc&view=rev Log: 2014-04-15 Bill Schmidt <wschm...@linux.vnet.ibm.com> PR target/60839 Revert the following patch 2014-04-02 Michael Meissner <meiss...@linux.vnet.ibm.com> PR target/60735 * config/rs6000/rs6000.c (rs6000_hard_regno_mode_ok): If we have software floating point or no floating point registers, do not allow any type in the FPRs. Eliminate a test for SPE SIMD types in GPRs that occurs after we tested for GPRs that would never be true. * config/rs6000/rs6000.md (mov<mode>_softfloat32, FMOVE64): Rewrite tests to use TARGET_DOUBLE_FLOAT and TARGET_E500_DOUBLE, since the FMOVE64 type is DFmode/DDmode. If TARGET_E500_DOUBLE, specifically allow DDmode, since that does not use the SPE SIMD instructions. Modified: branches/gcc-4_9-branch/gcc/ChangeLog branches/gcc-4_9-branch/gcc/config/rs6000/rs6000.c branches/gcc-4_9-branch/gcc/config/rs6000/rs6000.md
