http://gcc.gnu.org/bugzilla/show_bug.cgi?id=59261
Jeffrey A. Law <law at redhat dot com> changed:
What |Removed |Added
----------------------------------------------------------------------------
Priority|P1 |P2
Status|UNCONFIRMED |NEW
Last reconfirmed| |2014-01-28
Ever confirmed|0 |1
--- Comment #6 from Jeffrey A. Law <law at redhat dot com> ---
Thanks. I've managed to reproduce the failure using those intermediate files.
However, I haven't managed to trigger the failure directly from source.
What's happening is we're getting into expand_shift_1:
Breakpoint 3, expand_shift_1 (code=LSHIFT_EXPR, mode=V8QImode,
shifted=0x200000000416e0e0, amount=0x2000000004010410, target=0x0, unsignedp=0)
The amount is (const_int 1)
V8Q8mode isn't a valid shift mode for the ia64 target (mode iterator for the
shifts uses VECINT24). Since there isn't a pattern for this, no libcall and
the generic bits don't know how to synthesize the shift, we trip the assertion
and die.
We get into this code trying to expand:
<mult_expr 0x200000000414cac8
type <vector_type 0x20000000041513b0
type <integer_type 0x20000000040e2028 public unsigned QI
size <integer_cst 0x2000000004029b80 constant 8>
unit size <integer_cst 0x2000000004029ba0 constant 1>
align 8 symtab 0 alias set 0 canonical type 0x20000000040e2028
precision 8 min <integer_cst 0x200000000402b300 0> max <integer_cst
0x200000000402b320 255>>
unsigned V8QI
size <integer_cst 0x20000000040299c0 constant 64>
unit size <integer_cst 0x20000000040299e0 constant 8>
align 64 symtab 0 alias set -1 canonical type 0x20000000041513b0 nunits
8>
arg 0 <ssa_name 0x2000000004142178 type <vector_type 0x20000000041513b0>
visited var <var_decl 0x200000000401dc80 vect__34.18>def_stmt
vect__34.18_241 = VIEW_CONVERT_EXPR<vector(8) unsigned char>(vect__33.17_242);
version 241>
arg 1 <vector_cst 0x200000000413e300 type <vector_type 0x20000000041513b0>
constant
elt0: <integer_cst 0x200000000402b500 constant 3> elt1: <integer_cst
0x200000000402b500 3> elt2: <integer_cst 0x200000000402b500 3> elt3:
<integer_cst 0x200000000402b500 3> elt4: <integer_cst 0x200000000402b500 3>
elt5: <integer_cst 0x200000000402b500 3> elt6: <integer_cst
0x200000000402b500 3> elt7: <integer_cst 0x200000000402b500 3>>
../gcc/testsuite/gcc.dg/vect/bb-slp-26.c:19:14>
Clearly expanding a V8QImode multiply using a shift is a bad idea on Itanic.
What I don't see is how to stop the code form using shifts like this.
Regardless, the bug is confirmed, but given it's Itanic, it's certainly not
worthy of P1 status.
